What Your SoC Designer Might Not Tell You About Power Management
System designers must understand the interactions between on-chip power-management processes and the rest of the system, or they may find that trying to save power can lead to lowered efficiency or even serious malfunctions.
By Ron Wilson, Editor-in-Chief, Altera Corporation
System designers today are beneficiaries of the enormous effort that system-on-chip (SoC) designers have put into chip-level power management. But for systems to actually consume less energy, system design teams must know what their SoC’s power management actually does. They must...
Published By: Altera - Thursday, 9 August, 2012